Patent Number: 6,294,939

Title: Device and method for data input buffering

Abstract: A substantially noise-free data input buffer for an asynchronous device, such as a static random access memory (SRAM). The input buffer generates either a logical true or complement output signal representation of a data input signal and includes timing circuitry to delay an edge transition on the output signal for a predetermined period of time in response to a signal edge transition appearing on the data input signal. The input buffer further includes edge transition detection (ETD) circuitry for generating an initialization signal in response to the generation of the data output signal.

Inventors: McClure; David C. (Carrollton, TX)

Assignee: STMicroelectronics, Inc.

International Classification: G11C 7/10 (20060101); G11C 11/419 (20060101); H03K 5/1534 (20060101); H03K 5/153 (20060101); H03K 003/017 (); H03K 005/04 (); H03K 007/08 ()

Expiration Date: 09/25/2018