Patent Number: 6,295,232

Title: Dual-to-single-rail converter for the read out of static storage arrays

Abstract: A read circuit for semiconductor storage cells (10, 50) including dual read bitlines (23, 24, 51, 52) driven by the cell to full `zero` signals and `weak one` signals comprises a read head circuit (53) which includes an inverter (56) in one of the bitlines (52). The inverter serves to turn a `weak one` signal to a full `zero` signal. A bit select circuit is integrated into the read head circuit (53) and connects the output of the inverter and the other one of the bitlines (51) through bit select switches (57, 58) to the single line output (XT1) of the read head circuit (53).

Inventors: Pille; Juergen (Stuttgart, DE), Helwig; Klaus (Weil im Schoenbuch, DE), Wendel; Dieter (Schoenaich, DE)

Assignee: International Business Machines Corporation

International Classification: G11C 7/06 (20060101); G11C 11/419 (20060101); G11C 007/00 ()

Expiration Date: 09/25/2018