Patent Number: 6,297,532

Title: Semiconductor device and method of manufacturing the same

Abstract: The present invention aims to provide a semiconductor device in which a satisfactory breakdown voltage can be obtained without increasing its chip size, and a method of manufacturing the same. A first electrode layer and a second electrode layer are formed. An inorganic type silicon oxide film is formed so as to cover first and second electrodes. An organic type silicon oxide film is formed on a surface of inorganic type silicon oxide film above a portion of a surface of first electrode layer. At a region of inorganic type silicon oxide film where organic type silicon oxide film is not formed, a through hole is formed, exposing a portion of a surface of second electrode layer. An interconnection layer is formed so as to be in contact with second electrode layer via through hole and opposing first electrode layer with inorganic and organic type silicon oxide films therebetween.

Inventors: Yamamoto; Fumitoshi (Hyogo, JP), Terashima; Tomohide (Hyogo, JP)

Assignee: Mitsubishi Denki Kabushiki Kaisha

International Classification: H01L 21/70 (20060101); H01L 23/532 (20060101); H01L 23/52 (20060101); H01L 29/02 (20060101); H01L 23/485 (20060101); H01L 21/768 (20060101); H01L 29/06 (20060101); H01L 23/48 (20060101); H01L 029/78 (); H01L 033/00 ()

Expiration Date: 10/02/2018