Patent Number: 6,297,643

Title: Connection test method

Abstract: The invention relates to a method of testing interconnections in integrated circuit (IC) assemblies. Hereto, a test signal is applied to an IC pin (110) providing an input terminal to the interconnection. In known methods, such as the boundary-scan method, a response signal is measured on an output terminal of the interconnection, provided by a further IC pin. According to the invention, however, a response signal is evaluated which is generated on the same terminal (110) as to which the test signal is applied. This has the advantage that the method of the invention can be applied when only one end of the interconnect to be tested can be supplied with appropriate test hardware. The method is particularly suited for testing a capacitance (195) between an IC pin (110) and a supply line, e.g. a ground line.

Inventors: De Jong; Franciscus G. M. (Eindhoven, NL), Muris; Mathias N. M. (Eindhoven, NL), Schuttert; Rodger F. (Eindhoven, NL), De Wilde; Johannes (Eindhoven, NL)

Assignee: U.S. Philips Corporation

International Classification: G01R 31/28 (20060101); H01H 031/02 (); G01R 019/00 (); G01R 027/28 (); G01R 027/26 ()

Expiration Date: 10/02/2018