Patent Number: 6,297,685

Title: High-speed fully-compensated low-voltage differential driver/translator circuit arrangement

Abstract: An output buffer provides a stable, predetermined low voltage differential over power supply, temperature, and process variations yet has a high speed of operation. More particularly, a data path of an output buffer includes an emitter-coupled differential amplifier followed by an output section of two level-shifting emitter followers. A predetermined operating current biases the differential amplifier for unsaturated operation and a reference current biases the output section for unsaturated operation. The data path remains unencumbered by compensation circuitry to preserve high speed operation. Instead, a voltage compensator biases the differential amplifier to compensate, at least in part, for variations in a supply voltage. In addition, a variable biasing current to the voltage compensator with a predetermined temperature coefficient may further temperature compensate the differential amplifier. In addition to such "upstream" compensation, the output buffer may further include "downstream" temperature compensation by the addition of a V.sub.BE multiplier circuit to the reference current biasing of the output section. Additional temperature and level-shifting compensation may also be achieved through cascading a plurality of buffer stages.

Inventors: Ewen; John Farley (Rochester, MN), Wilkinson-Gruber; Stephen Charles (Rochester, MN)

Assignee: International Business Machines Corporation

International Classification: H03K 19/003 (20060101); H03K 003/42 ()

Expiration Date: 10/02/2018