Patent Number: 6,298,004

Title: Semiconductor device, semiconductor system, and digital delay circuit

Abstract: Disclosed is a semiconductor device for outputting an output signal with a given phase held relative to an external clock despite a difference in characteristic, a change in temperature, and a fluctuation in supply voltage. The semiconductor device comprises an input circuit for inputting the external clock and outputting a reference signal, an output circuit for receiving an output timing signal and outputting an output signal according to the timing of the output timing signal, and an output timing control circuit for controlling the output timing so that the output signal exhibits a given phase relative to the external clock. The output timing control circuit includes a delay circuit for delaying the reference signal by a specified magnitude and generating an output timing signal, a phase comparison circuit for comparing the phase of the output timing signal with the phase of the reference signal, and a delay control circuit for specifying the magnitude of a delay to be produced by the delay circuit according to the result of comparison performed by the phase comparison circuit.

Inventors: Kawasaki; Kenichi (Kawasaki, JP), Sato; Yasuharu (Kawasaki, JP), Kitahara; Terumasa (Kawasaki, JP), Nakano; Masao (Kawasaki, JP), Taguchi; Masao (Kawasaki, JP), Takemae; Yoshihiro (Kawasaki, JP), Matsuzaki; Yasurou (Kawasaki, JP), Nishimura; Koichi (Kawasaki, JP), Okajima; Yoshinori (Kawasaki, JP), Shinozaki; Naoharu (Kawasaki, JP), Douchi; Hiroko (Kawasaki, JP)

Assignee: Fujitsu Limited

International Classification: G06F 13/42 (20060101); G11C 7/22 (20060101); G11C 7/00 (20060101); G11C 7/10 (20060101); G11C 008/00 ()

Expiration Date: 10/02/2018