Patent Number: 6,298,135

Title: Method of preventing power analysis attacks on microelectronic assemblies

Abstract: Apparatus in form of a microelectronic assembly including an integrated circuit (IC) for execution of an embedded modular exponentiation program utilizing a square-and-multiply algorithm, wherein in the modular exponentiation program a secret exponent having a plurality of bits characterizes a private key, a method of providing a digital signature to prevent the detection of the secret exponent when monitoring power variations during the IC execution, the method comprising the steps of for a first operation in the modular exponentiation, selecting at least one predetermined bit, wherein the at least one predetermined bit is a bit other than a least significant bit (LSB) and the most significant bit (MSB); using the square-and-multiply algorithm, sequentially selecting bits to the left of the at least one predetermined bit for exponentiation until the MSB is selected; subsequent to selecting the MSB, sequentially selecting bits to the right of the at least one predetermined bit for exponentiation until the LSB is selected.

Inventors: Messerges; Thomas S. (Schaumburg, IL), Dabbish; Ezzat A. (Cary, IL)

Assignee: Motorola, Inc.

International Classification: G06F 7/72 (20060101); G06F 7/60 (20060101); H04L 009/00 ()

Expiration Date: 10/02/2018