Patent Number: 6,298,355

Title: Computer system

Abstract: A storage control unit of a computer system in which main storage is shared between one through a plurality of processors, is provided with transfer control means for holding therein address information in a first area of the main storage, in which desired data specified by an arbitrary processor is stored, address information in a second area of the main storage device, to which the desired data is to be transferred, and information about the length of the desired data, and transfer means for reading the data stored in the first area and storing the data in the second area under the control of the transfer control means. Owing to these configurations, the storage control unit is capable of executing a copy of data from the first area to the second area separately from the processors according to instructions from each processor. Thus, the load on each processor can be reduced. Since a processor bus may be unused in data copying when the plurality of processors are connected to the processor bus, the load on the processor bus can be greatly reduced.

Inventors: Tanaka; Teruo (Hadano, JP), Sakakibara; Tadayuki (Hadano, JP), Maeda; Hiromitsu (Yamato, JP)

Assignee: Hitachi, Ltd.

International Classification: G06F 13/16 (20060101); G06F 017/00 ()

Expiration Date: 10/02/2018