Patent Number: 6,298,466

Title: Method and system for synthesizing operational amplifiers for amplifying systems with minimal total harmonic distortion

Abstract: A method and system for designing a two-stage operational amplifier having low total harmonic distortion. The method begins with estimating a gain level of a second stage of the operational amplifier. Then a transconductance of the second stage is calculated. A unity gain frequency level for the first stage is calculated and from that the one kilohertz gain level of the first stage. The gain level at one kilohertz is then calculated and from this, the unity gain frequency for the operational amplifier is then calculated. A value of the compensation capacitor for said operational amplifier is calculated followed by calculating a transconductance of a first stage of the operational amplifier. The overall D.C. gain level and the output resistance of the first stage of the operational amplifier is then determined. The transconductance of the first and second stages, the output resistance of the first stage with the load capacitance and resistance will be used to synthesize transistor sizes and bias current levels of the operational amplifier. The design is then simulated for stability and the method is repeated until stability is achieved.

Inventors: Dasgupta; Uday (Singapore, SG)

Assignee: Tritech Microelectronics, Ltd.

International Classification: H03F 1/08 (20060101); H03F 1/34 (20060101); G06F 017/50 (); H03F 003/45 (); H03G 003/10 (); H03G 003/18 (); H03G 003/30 ()

Expiration Date: 10/02/2018