Patent Number: 6,298,470

Title: Method for efficient manufacturing of integrated circuits

Abstract: This invention pertains to a method for the systematic development ofintegrated chip technology. The method may include obtaining empiricaldata of parameters for an existing integrated circuit manufacturingprocess and extrapolating the known data to a new technology to assesspotential yields of the new technology from the known process. Further,process variables of the new process may be adjusted based upon theempirical data in order to optimize the yields of the new technology. Alogic based computing system such as a fuzzy logic or neural-networksystem may be utilized. The computing system may also be utilized toimprove the yields of an existing manufacturing process by adjust processvariables within downstream process tools based upon data collected inupstream process for a particular semiconductor substrate or lot.

Inventors: Breiner; Lyle (Meridian, ID), Thakur; Randhir P. S. (San Jose, CA)

Assignee:

International Classification:

Expiration Date: 10/02/2013