Patent Number: 6,309,907

Title: Method of fabricating transistor with silicon oxycarbide gate

Abstract: A CMOS-compatible FET has a reduced electron affinity polycrystalline or microcrystalline silicon oxycarbide (SiOC) gate that is electrically isolated (floating) or interconnected. The SiOC material composition is selected to establish a desired barrier energy between the SiOC gate and a gate insulator. In a memory application, such as a flash EEPROM, the SiOC composition is selected to establish a lower barrier energy to reduce write and erase voltages and times or accommodate the particular data charge retention time needed for the particular application. In a light detector or imaging application, the SiOC composition is selected to provide sensitivity to the desired wavelength of light. Unlike conventional photodetectors, light is absorbed in the floating gate, thereby ejecting previously stored electrons therefrom. Also unlike conventional photodetectors, the light detector according to the present invention is actually more sensitive to lower energy photons as the semiconductor bandgap is increased.

Inventors: Forbes; Leonard (Corvallis, OR), Geusic; Joseph E. (Berkeley Heights, NJ), Ahn; Kie Y. (Chappaqua, NY)

Assignee: Micron Technology, Inc.

International Classification: H01L 21/02 (20060101); H01L 29/49 (20060101); H01L 21/336 (20060101); H01L 21/28 (20060101); H01L 31/112 (20060101); H01L 29/423 (20060101); H01L 31/101 (20060101); H01L 29/40 (20060101); H01L 021/00 ()

Expiration Date: 10/30/2018