Patent Number: 6,309,925

Title: Method for manufacturing capacitor

Abstract: A method for manufacturing a capacitor. A semiconductor substrate isdivided into a peripheral circuit region and a memory cell region. Anisolation structure is formed in the memory cell region. A gate oxidelayer is formed over the substrate outside the isolation structure. Apolysilicon layer is formed over the gate oxide layer and the isolationstructure. The polysilicon layer and the gate oxide layer are patterned toform a bottom electrode above the isolation structure. In the meantime apolysilicon gate electrode is also formed above the peripheral circuitregion. Spacers are formed on the sidewalls of the polysilicon gateelectrode and the bottom electrode. A metal silicide layer is formed overthe bottom electrode and the polysilicon gate electrode. A dielectriclayer is formed over the metal silicide layer above the bottom electrode.A metallic layer is formed over the dielectric layer to form a capacitor.

Inventors: Jung; Tz-Guei (Hsinchu, TW), Hou; Chia-Hsin (Hsinchu Hsien, TW), Ko; Joe (Hsinchu, TW)


International Classification:

Expiration Date: 10/32013