Patent Number: 6,309,936

Title: Integrated formation of LDD and non-LDD semiconductor devices

Abstract: A method of forming a semiconductor device includes forming a first gate electrode over a substrate and then forming a spacer on at least one sidewall of the first gate electrode. A second gate electrode is formed over the substrate after forming the spacer. A first dopant is implanted into the substrate to form a first heavily doped active region adjacent to the spacer and spaced from the first gate electrode and a second heavily doped active region adjacent to the second gate electrode. The spacer is then removed and a second dopant is implanted into the substrate to form a lightly doped active region adjacent to the first gate electrode. In some instances, gate dielectrics for the first and second gate electrodes are formed using different materials and/or having different thicknesses.

Inventors: Gardner; Mark I. (Cedar Creek, TX), Paiz; Robert (Austin, TX), Spikes, Jr.; Thomas E. (Round Rock, TX)

Assignee: Advanced Micro Devices, Inc.

International Classification: H01L 21/70 (20060101); H01L 21/8234 (20060101); H01L 021/336 ()

Expiration Date: 10/30/2018