Patent Number: 6,309,947

Title: Method of manufacturing a semiconductor device with improved isolation region to active region topography

Abstract: A method of making a semiconductor device with improved isolation region to active region topography includes forming a masking layer on a surface of a substrate. A portion of the masking layer is removed to define one or more field regions and at least one trench is formed in the one or more field regions. An oxide layer is formed which substantially fills the trench and then a portion of the oxide layer is removed to leave the oxide layer with a relatively planar surface that is recessed with respect to the masking layer. The masking layer is then removed to expose the substrate. There may be a height differential between the substrate surface and the relatively planer surface of the oxide layer, however, the height differential is substantially less than the thickness of the masking layer.

Inventors: Bandyopadhyay; Basab (Austin, TX), Bonser; Douglas J. (Austin, TX)

Assignee: Advanced Micro Devices, Inc.

International Classification: H01L 21/70 (20060101); H01L 21/762 (20060101); H01L 021/762 ()

Expiration Date: 10/30/2018