Patent Number: 6,309,962

Title: Film stack and etching sequence for dual damascene

Abstract: A process for forming a dual damascene cavity in a dielectric, particularly a low k organic dielectric, is described. The dielectric is composed of two layers separated by an etch stop layer. Formation of the damascene cavity is achieved by using a hard mask that is made up of two layers of silicon oxynitride separated by layer of silicon oxide. For both the trench first and via first approaches, the first cavity is formed using only the upper silicon oxynitride layer as the mask. Thus, when the second portion is patterned, little or no misalignment occurs because said upper layer is relatively thin. Additional etching steps result in a cavity and trench part that extend as far as the etch stop layer located between the dielectric layers. Final removal of photoresist occurs with a hard mask still in place so no damage to the organic dielectric occurs. A final etch step then completes the process.

Inventors: Chen; Chao-Cheng (Matou, TW), Chao; Li-Chi (Yang-mei, TW), Liu; Jen-Cheng (Chia-Yih, TW), Lui; Min-Huei (Panchiao, TW), Tsai; Chia-Shiung (Hsin-chu, TW)

Assignee: Taiwan Semiconductor Manufacturing Company

International Classification: H01L 21/02 (20060101); H01L 21/70 (20060101); H01L 21/768 (20060101); H01L 21/311 (20060101); H01L 021/476 (); H01L 021/311 (); H01L 021/461 ()

Expiration Date: 10/30/2018