Patent Number: 6,310,363

Title: Thin-film transistor and semiconductor device using thin-film transistors with N and P impurities in the source and drain regions

Abstract: In those thin-film transistors (TFTs) employing as its active layer a silicon film crystallized using a metal element, the objective is to eliminate bad affection of such metal element to the TFT characteristics. To this end, in a TFT having as its active layer a crystalline silicon film that was crystallized using nickel (Ni), those regions corresponding to the source/drain thereof are doped with phosphorus; thereafter, thermal processing is performed. During this process, nickel residing in a channel formation region is "gettered" into previously phosphorus-doped regions. With such an arrangement, it becomes possible to reduce the Ni concentration in certain regions in which lightly-doped impurity regions will be formed later, which in turn enables suppression of affection to TFT characteristics.

Inventors: Ohnuma; Hideto (Kanagawa, JP), Yamazaki; Shunpei (Tokyo, JP)

Assignee: Semiconductor Energy Laboratory Co., Ltd.

International Classification: H01L 21/02 (20060101); H01L 29/66 (20060101); H01L 21/336 (20060101); H01L 29/786 (20060101); H01L 029/00 ()

Expiration Date: 10/30/2018