Patent Number: 6,310,366

Title: Retrograde well structure for a CMOS imager

Abstract: A retrograde well structure for a CMOS imager that improves the quantum efficiency and signal-to-noise ratio of the imager. The retrograde well comprises a doped region with a vertically graded dopant concentration that is lowest at the substrate surface, and highest at the bottom of the well. A single retrograde well may have a single pixel sensor cell, multiple pixel sensor cells, or even an entire array of pixel sensor cells formed therein. The highly concentrated region at the bottom of the retrograde well repels signal carriers from the photosensor so that they are not lost to the substrate, and prevents noise carriers from the substrate from diffusing up into the photosensor. Also disclosed are methods for forming the retrograde well.

Inventors: Rhodes; Howard E. (Boise, ID), Durcan; Mark (Boise, ID)

Assignee: Micron Technology, Inc.

International Classification: H01L 31/12 (20060101); H01L 31/06 (20060101); H01L 27/148 (20060101); H01L 31/062 (20060101); H01L 031/062 (); H01L 031/12 ()

Expiration Date: 10/30/2018