Patent Number: 6,310,373

Title: Metal insulator semiconductor structure with polarization-compatible bufferlayer

Abstract: An MIS device (20) includes a semiconducting substrate (22), a siliconnitride buffer layer (24), a ferroelectric metal oxide superlatticematerial (26), and a noble metal top electrode (28). The layeredsuperlattice material (26) is preferably a strontium bismuth tantalate,strontium bismuth niobate, or strontium bismuth niobium tantalate. Thedevice is constructed according to a preferred method that includesforming the silicon nitride on the semiconducting substrate prior todeposition of the layered superlattice material. The layered superlatticematerial is preferably deposited using liquid polyoxyalkylated metalorganic precursors that spontaneously generate a layered superlattice uponheating of the precursor solution. UV exposure during drying of theprecursor liquid imparts a C-axis orientation to the final crystal, andresults in improved thin-film electrical properties.

Inventors: Azuma; Masamichi (Osaka, JP), Paz De Araujo; Carlos A. (Colorado Springs, CO)


International Classification:

Expiration Date: 10/32013