Patent Number: 6,310,394

Title: Reduced parasitic capacitance semiconductor devices

Abstract: Semiconductor devices comprise a substrate having a semiconductor disposed thereon with a layer of dielectric material, less than 10 microns thick, disposed about the semiconductor; the dielectric layer has a bond pad disposed on its upper surface a via lined with an electrically conductive material and extending between the bond pad and the semiconductor form an electrically conductive path between the semiconductor device and the bond pad.

Inventors: Anand; Yoginder (Chelmsford, MA), Chinoy; Percy Bomi (Burlington, MA)

Assignee: Tyco Electronics

International Classification: H01L 23/28 (20060101); H01L 23/485 (20060101); H01L 23/48 (20060101); H01L 23/66 (20060101); H01L 23/29 (20060101); H01L 23/58 (20060101); H01L 023/34 ()

Expiration Date: 10/30/2018