Patent Number: 6,310,402

Title: Semiconductor die having input/output cells and contact pads in the periphery of a substrate

Abstract: The width of an input/output forming region is matched with the minimum width adoptable as a layout interval between pads in advance. Pads corresponding to (least common multiple).div.(layout interval between pads) in number are disposed so as to correspond to input/output cells corresponding to (least common multiple).div.(width of input/output cell forming region) in number, based on the least common multiple between the width of each input/output cell forming region and the layout interval between the pads. Owing to such a construction, a semiconductor device can be provided which meets user demands with ease and in a short time.

Inventors: Watanabe; Shinichiro (Tokyo, JP)

Assignee: Oki Electric Industry Co., Ltd.

International Classification: H01L 27/118 (20060101); H01L 027/02 ()

Expiration Date: 10/30/2018