Patent Number: 6,310,596

Title: Serial access memory

Abstract: A serial access memory having a first memory cell array and a second memorycell array. The serial access memory is provided with a control circuitfor controlling the Most Significant Bit (MSB) of an address supplied toeach of the first and second memory cell arrays. The control circuitcauses the operations of circuits in the first memory cell array to becomeidentical to those of circuits in the second memory cell array, therebymaking it possible to read data at a high speed. An STN type LCD includingthe serial access memory, has a display device that facilitates productionof memory maps in the memory cells without a need for externally-mountedelements such as a multiplexer.

Inventors: Takasugi; Atsushi (Tokyo, JP)


International Classification:

Expiration Date: 10/32013