Patent Number: 6,310,599

Title: Method and apparatus for providing LCD panel protection in an LCD display controller

Abstract: A flat panel display controller is provided with a circuit for monitoring clocking signal(s) to the flat panel display. A clocking signal output to the flat panel display may be fed back to the display controller using a conventional I/O pad. In the preferred embodiment, the fed back clocking signal resets a counter. In a second embodiment, the fed back clocking signal may then pass through an edge detector whose output then resets the counter. The counter will overflow if a edge signal is not received within a predetermined time period. If an overflow occurs, the carry signal of the counter will initiate a flat panel power shutdown through power control circuitry. The clock signal for the counter may be derived from an off-chip oscillator such that if a failure occurs within the display controller, the counter will continue to function.

Inventors: Bril; Vlad (Campbell, CA), Eglit; Alexander Julian (Half Moon Bay, CA), Han; Robin Sungsoo (Saratoga, CA), Jammula; Muralidhar Reddy (Fremont, CA)

Assignee: Cirrus Logic, Inc.

International Classification: G09G 3/36 (20060101); G09G 003/33 ()

Expiration Date: 10/30/2018