Patent Number: 6,310,653

Title: Phase comparison and phase adjustment for synchronization to a reference signal that is asynchronous with respect to a digital sampling clock

Abstract: A periodic multi-bit digital signal is synthesized having a frequency that is specified by the frequency of a periodic reference signal that is asynchronous with respect to a sampling clock of the periodic digital signal. In a digital video system, for example, a digital color subcarrier is synthesized and synchronized to a reference frequency of a crystal oscillator that is asynchronous with respect to a digital system clock for the digital video system. The periodic digital signal is generated by an adjustable digital oscillator clocked by the sampling clock. The frequency or phase of the periodic digital signal is compared to the frequency or phase of the periodic reference signal to produce an adjustment value for adjusting the periodic digital signal to synchronize the periodic digital signal with the periodic reference signal. The digital oscillator, for example, generates the periodic digital signal at the sampling rate by periodically incrementing an accumulator with the adjustment value. The frequency or phase of the periodic digital signal is compared to the frequency or phase of the periodic reference signal, for example, by an up/down counter that is incremented or decremented each cycle of the reference signal and is decremented or incremented each cycle of the digital carrier signal to compute the adjustment value.

Inventors: Malcolm, Jr.; Ronald D. (Austin, TX), Lutz; Juergen (Austin, TX)

Assignee:

International Classification: H03L 7/085 (20060101); H03L 7/099 (20060101); H03L 7/08 (20060101); H04N 5/12 (20060101); H03L 7/181 (20060101); H03L 7/16 (20060101); H04N 9/45 (20060101); H04N 9/44 (20060101); H04N 005/12 (); H03L 007/00 ()

Expiration Date: 10/30/2018