Patent Number: 6,310,798

Title: Semiconductor memory and method for manufacture thereof

Abstract: A semiconductor memory which can secure the stability of data holding characteristics and data read/write characteristics for a tunnel diode having a small peak/valley ratio, and to provide a method for manufacturing such a semiconductor memory. The peak/valley ratio of a tunnel diode can be improved by arranging a tunnel insulating film on the bottom portion of the ground direct contact forming the tunnel diode; the resistance of high resistance load can further be increased by arranging a tunnel insulating film on the bottom portion of the storage node direct contact; and data holding characteristics can be improved while controlling the column current by setting the power voltage impressed to the high resistance load higher than the power voltage impressed to the bit line. Stable data read/write characteristics can be secured while controlling the column current by increasing drain resistance by utilizing the drain region side of the access transistor as a P.sup.- -type active region, and by arranging a tunnel insulating film on the bottom portion of the bit-line direct contact.

Inventors: Morimoto; Rui (Tokyo, JP)

Assignee: Mitsubishi Denki Kabushiki Kaisha

International Classification: G11C 11/36 (20060101); G11C 11/38 (20060101); H01L 21/70 (20060101); H01L 27/11 (20060101); H01L 21/8244 (20060101); G11C 011/38 (); G11C 011/40 ()

Expiration Date: 10/30/2018