Patent Number: 6,310,801

Title: Method and device for fast addressing redundant columns in a nonvolatilememory

Abstract: A method for addressing redundant columns in a nonvolatile memory, whichreceives, at inputs, selection addresses and comprises a plurality ofredundant columns, each including a respective bit line and a plurality ofmemory cells connected to the bit line. The addressing method comprisesthe steps of: detecting a transition in the selection addresses; startingcharging of all the bit lines upon detection of the transition in theaddresses; then detecting whether one of the redundant columns isaddressed; should one of the redundant columns be found to be addressed,proceeding with charging of the bit line of the redundant column addressedand interrupting charging of the bit lines of the redundant columns notaddressed; and should none of the redundant columns be found to beaddressed, interrupting charging of all the bit lines.

Inventors: Condemi; Carmelo (Gravina di Catania, IT), La Placa; Michele (Gravina di Catania, IT), Martines; Ignazio (Catania, IT)

Assignee:

International Classification:

Expiration Date: 10/32013