Patent Number: 6,310,808

Title: Semiconductor memory device having structure for high-speed data processing

Abstract: The semiconductor memory device separates data input/output lines into apair of write data lines and a pair of read data lines. A write gate isturned on with a column selection signal for writing, and a read gate isturned on with a column selection signal for reading. The pair of writedata lines are not precharged but only the pair of read data lines areprecharged in a transition to each operation. The pair of write data linesare precharged with a write mask signal in write masking. Thus, high-speeddata processing is implemented.

Inventors: Tanizaki; Hiroaki (Hyogo, JP)

Assignee:

International Classification:

Expiration Date: 10/32013