Patent Number: 6,310,825

Title: Data writing method for semiconductor memory device

Abstract: A semiconductor memory device includes a control circuit that sets read and write latency periods such that the write data input circuit is activated and acquires the write data after the receipt of a write command and upon the lapse of the write latency period. The write latency period of the memory device is set to be one latency value less than the read latency period.

Inventors: Furuyama; Takaaki (Kasugi, JP)

Assignee: Fujitsu Limited

International Classification: G11C 7/22 (20060101); G11C 7/00 (20060101); G11C 7/10 (20060101); G11C 11/407 (20060101); G11C 11/4076 (20060101); G11C 008/00 ()

Expiration Date: 10/30/2018