Patent Number: 6,310,913

Title: Circuit and method for modulating pulse width

Abstract: Signal C=[C.sub.n-1, C.sub.n-2, . . . , C.sub.1, C.sub.0 ] generated by a ring counter 1 is converted at a logic circuit 2 to a triangle pulse signal Q in which the carrier frequency of the PWM signal is equal to the frequency of the signal C raised to power of 2. The signal Q is input to the B input of a magnitude comparator 3. On the other hand, the modulation data D held by a data holding circuit 4 is compared with the converted signal Q in the magnitude comparator 3, and when the data D is greater than the signal Q, a PWM signal is obtained from the comparison result A>B. This PWM signal has no phase change and high resolution and is a low pulsating component. The resolution of the PWM signal per cycle of the ring counter 1 is held at n bits, and the carrier frequency is equal to the ring counter frequency raised to mth power of 2.

Inventors: Ishikawa; Yoji (Machida, JP)

Assignee: Asahi Kasei Kabushiki Kaisha

International Classification: G06F 1/02 (20060101); G06F 1/025 (20060101); H03K 7/00 (20060101); H03K 7/08 (20060101); H03K 007/08 (); H03K 009/08 ()

Expiration Date: 10/30/2018