Patent Number: 6,310,953

Title: Subscriber circuit

Abstract: In a subscriber circuit implementing the analog system, the 2B1Q system and the ping-pong system, a signal processing unit is divided into a signal output unit for outputting a signal for transmission and a bias unit for providing a voltage, the signal output unit being implemented by an amplifier unit characterized by a low withstand voltage and a broadband characteristic, and the bias unit is implemented by an amplifier unit characterized by a high withstand voltage and a narrowband characteristic.

Inventors: Yoshida; Kazuhiro (Kawasaki, JP), Takato; Kenji (Kawasaki, JP)

Assignee: Fujitsu Limited

International Classification: H04M 3/00 (20060101); H04M 3/22 (20060101); H04M 001/00 ()

Expiration Date: 10/30/2018