Patent Number: 6,311,050

Title: Single integrated circuit phase locked loop for synthesizing high-frequency signals for wireless communications and method for operating same

Abstract: A method and apparatus for synthesizing high-frequency signals is disclosed that overcomes integration problem associated with prior implementations while meeting demanding phase noise and other impurity requirements. In one embodiment, a phase-locked loop (PLL) frequency synthesizer is disclosed having a voltage controlled oscillator (VCO) with a variable capacitance that includes a discretely variable capacitance in conjunction with a continuously variable capacitance. The discretely variable capacitance may provide coarse tuning adjustment of the variable capacitance, and the continuously variable capacitance may provide a fine tuning adjustment of the variable capacitance. The invention disclosed avoids the need for a traditional varactor implementation in the VCO, for a traditional large capacitor component in the loop filter, and for component trimming during processing and thereby provides a high-frequency frequency synthesizer that may be fully integrated on a single chip except for an external inductor.

Inventors: Welland; David R. (Austin, TX), Wang; Caiyi (Austin, TX), Kerth; Donald A. (Austin, TX)

Assignee: Silicon Laboratories, Inc.

International Classification: H03L 7/099 (20060101); H03L 7/10 (20060101); H03L 7/08 (20060101); H03L 7/16 (20060101); H03L 7/23 (20060101); H03L 7/199 (20060101); H04Q 007/20 ()

Expiration Date: 10/30/2018