Patent Number: 6,311,245

Title: Method for time multiplexing a low-speed and a high-speed bus over shared signal lines of a physical bus

Abstract: A method for combining a low-speed communications bus and a high-speed communications bus into a single multiplexed communications bus that supports both low-speed and high-speed operations. The multiplexed communications bus contains a low-speed state machine and a high-speed state machine. The multiplexed communications bus is controlled by the low-speed state machine and operated at low speed in order to conduct transactions between two low-speed peripheral devices, and is controlled by the high-speed state machine and operated at high speed in order to conduct transactions between and two high-speed peripheral devices. For transactions between peripheral devices having different speeds, either a buffer is used to store data between data transmission and data reception by the two devices, or the low-speed and high-speed state machines are synchronized and operationally interleaved.

Inventors: Klein; Dean A. (Eagle, ID)

Assignee: Micron Technology, Inc.

International Classification: G06F 13/42 (20060101); G06F 013/00 ()

Expiration Date: 10/30/2018