Patent Number: 6,311,263

Title: Data processing circuits and interfaces

Abstract: An integrated circuit contains a microprocessor core, program memory and separate data storage, together with analogue and digital signal processing circuitry. The ALU is 16 bits wide, but a 32-bit shift unit is provided, using a pair of 16-bit registers. The processor has a fixed length instruction format, with an instruction set including multiply and divide operations which use the shift unit over several cycles. No interrupts are provided. External pins of the integrated circuit allow for single stepping and other debug operations, and a serial interface (SIF) which allows external communication of test data or working data as necessary. The serial interface has four wires (SERIN, SEROUT, SER-CLK, SERLOADB), allowing handshaking with a master apparatus, and allowing direct access to the memory space of the processor core, without specific program control. Within each processor cycle, the processor circuitry is divided into plural stages, and latches are interposed between the stages to minimize power consumption.

Inventors: Barlow; Stephen John (Cambridge, GB), Morfey; Alistair Guy (Cambridge, GB), Collier; James Digby (Cambridge, GB)

Assignee: Cambridge Silicon Radio Limited

International Classification: G06F 7/48 (20060101); G06F 9/38 (20060101); G06F 9/30 (20060101); G06F 9/302 (20060101); G06F 7/57 (20060101); G06F 11/36 (20060101); G06F 11/267 (20060101); G06F 013/364 (); G06F 013/36 (); G06F 013/16 (); G06F 009/44 ()

Expiration Date: 10/30/2018