Patent Number: 6,311,273

Title: Method and apparatus for enhancing computer system security

Abstract: A security enhanced computer system arrangement includes a coprocessor anda multiprocessor logic controller inserted into the architecture of aconventional computer system. The coprocessor and multiprocessor logiccontroller is interposed between the CPU of the conventional computersystem to intercept and replace control signals that are passed overcertain of the critical control signal lines associated with the CPU. Themultiprocessor logic controller arrangement thereby isolates the CPU ofthe conventional computer system from the remainder of the conventionalcomputer system, permitting separate control over the CPU and separatecontrol over the remainder of the computer system. By controlling thecontrol signals that are normally passed between the CPU and the remainderof the computer system, the multiprocessor logic controller permits thecoprocessor to perform highly secure operations. These secure operations,selectable by a trusted operator or built in to a cooperating operatingsystem, verify that the computer system is a trusted computing base whichcan be relied upon to perform its operations properly and withoutcompromise.

Inventors: Helbig, Sr.; Walter A. (Medford Lakes, NJ), Ackerman, III; William H. (Somerdale, NJ)


International Classification:

Expiration Date: 10/32013