Patent Number: 6,311,281

Title: Apparatus and method for changing processor clock ratio settings

Abstract: A processor has an external pin that can be asserted to lock in new clock ratio information dynamically. A state machine of the processor defines a stop grant state that is utilized to halt the internal clocking signal of the processor. A storage location, such as a register, is utilized to load new clock frequency information into the clock generator circuit of the processor. De-asserting the external pin of the processor causes the processor to resume normal operations, but at the newly set clock frequency.

Inventors: Pole, II; Edwin J. (Hillsboro, OR), Orton; John T. (Los Altos, CA), Nguyen; Cau L. (Fremont, CA), Singh; Gurbir (Portland, OR), Dai; Xia (Fremont, CA), Nagaraj; Ravi (Lakeville, MN)

Assignee: Taylor; Edwin H.

International Classification: G06F 1/08 (20060101); H03L 7/06 (20060101); G06F 001/04 ()

Expiration Date: 10/30/2018