Patent Number: 6,311,298

Title: Mechanism to simplify built-in self test of a control store unit

Abstract: A control store unit having a control store address generator able to provide both the normal control store address generation functions, and the BIST/logout address generation functions. In response to a test enable signal, the address generator switches between two modes: a normal mode and a test mode. Under the normal mode, normal control store addresses are generated. Under the test mode, a sequence of BIST/logout addresses are generated that sequentially cycles through the entire control store memory at full CPU speed.

Inventors: Norrie; Christopher I. W. (San Jose, CA)

Assignee: Rise Technology Company

International Classification: G11C 29/04 (20060101); G11C 29/32 (20060101); G11C 29/20 (20060101); G11C 29/10 (20060101); G11C 29/46 (20060101); G11C 029/00 (); G06F 015/00 (); G06F 009/30 ()

Expiration Date: 10/30/2018