Patent Number: 6,324,622

Title: 6XX bus with exclusive intervention

Abstract: Data loaded from system memory to a cache within a multiprocessor system isset to the exclusive coherency state if no other cache or processor has acopy of that data. Subsequent accesses to the data by another processor orcache which are snooped by the data owner result in an exclusiveintervention by the data owner. The data owner sources the data to andshares the data with the requesting device on a read and transfersexclusive ownership of the data to the requesting device on a read withintent to modify. Unmodified intervention with cache-to-cache transfersover possibly much slower accesses to memory is thus supported by themultiprocessor system without requiring additional tag or status bits inthe cache directories, saving a significant area.

Inventors: Okpisz; Alexander Edward (Austin, TX), Petersen; Thomas Albert (Austin, TX)


International Classification: G06F 12/08 (20060101); G06F 012/00 ()

Expiration Date: 11/27/2014