Patent Number: 6,332,833

Title: Method for fabricating silicon semiconductor discrete wafer

Abstract: A method of fabricating a silicon semiconductor discrete wafer while dressing the grinding wheel is disclosed that assures excellent finishing accuracy and productivity. The dressing of the grinding wheel includes mixing air and grinding water from a surface grinding process including semiconductor chips lapped with abrasive grains having a count of at least #2000 and no more than #6000 and jetting the mixed air and grinding water as minute water drops back onto the surface of the grinding wheel during grinding of a wafer. Both cut surfaces are ground to a predetermined thickness with the dressed grinding wheel (via a surface grinding machine). The processing surface is wet-etched as the final processing.

Inventors: Ohshima; Hisashi (Niigata-ken, JP), Satoh; Tsutomu (Niigata-ken, JP)

Assignee: Naoetsu Electronics Company

International Classification: B24B 37/04 (20060101); B28D 5/00 (20060101); B28D 5/02 (20060101); B24B 7/22 (20060101); B24B 7/20 (20060101); H01L 21/306 (20060101); H01L 21/02 (20060101); H01L 21/304 (20060101); B24B 053/00 ()

Expiration Date: 12/25/2018