Patent Number: 6,333,235

Title: Method for forming SiGe bipolar transistor

Abstract: A method for fabricating bipolar transistor frequently used in high frequency circuit is disclosed herein. The foregoing method includes the following steps. First, a first oxide layer is formed on a p-type substrate, followed by developing a first photoresist pattern on the first oxide layer. A first, doped region is formed in the exposed substrate by a first implanting step. The first doped region comprises a n+ buried layer. Stripping of the first photoresist pattern, and annealing of the n+ buried layer follow. Removal of the first oxide layer to expose the n+ buried layer and a portion of the p-type substrate follows thereafter. These steps are followed by growing a first epitaxial layer on the n+ buried layer and a portion of the substrate, then a second epitaxial layer is formed on the first epitaxial layer. The first epitaxial layer is made of epitaxial n-type silicon, and the second epitaxial layer is made of in situ epitaxial p-type SiGe. Next, a plurality of first and second trench isolation are formed. A gate oxide layer is formed and the extrinsic base is formed in the second epitaxial layer. A polysilicon emitter pattern is formed and is connected to the intrinsic base, followed by the fabrication of a silicide pattern connected to the n+ buried layer, whereby the collector is formed. A portion of the gate oxide layer is etched, and the underlying extrinsic base as the well as the intrinsic base acting as the base of the bipolar transistor is connected to a metal pattern.

Inventors: Lee; Chwan-Ying (Tainan, TW), Huang; Tzuen-Hsi (Tou Liu, TW)

Assignee: Industrial TechnologyResearch Institute

International Classification: H01L 21/02 (20060101); H01L 21/331 (20060101); H01L 021/331 (); H01L 021/822 ()

Expiration Date: 12/25/2018