Patent Number: 6,337,828

Title: Semiconductor memory device having function of supplying stable power supply voltage

Abstract: The inventive semiconductor memory device comprises a synchronous circuit formed by a PLL circuit requiring precise operations, an internal circuit group and a VDC circuit. The VDC circuit, a capacitor, a PMOS transistor for a dummy current and an NMOS transistor serving as a high impedance element are arranged for the synchronous circuit. The VDC circuit is arranged for the internal circuit group. The VDC circuit eliminates power supply noise. The PMOS transistor stabilizes the operation of a differential amplifier of the VDC circuit. The capacitor keeps potential difference between a power supply side and a GND side constant. The NMOS transistor stabilizes the voltage on the GND side.

Inventors: Ooishi; Tsukasa (Hyogo, JP), Setogawa; Jun (Hyogo, JP)

Assignee: Mitsubishi Denki Kabushiki Kaisha

International Classification: G11C 11/4074 (20060101); G11C 5/14 (20060101); G11C 11/407 (20060101); G11C 005/14 ()

Expiration Date: 01/08/2019