Patent Number: 6,396,302

Title: Configurable logic element with expander structures

Abstract: A configurable logic element (CLE) for a field programmable gate array (FPGA) includes "expanders", i.e., connectors that allow fast signal communication between logic blocks. Expanders allow the configurable interconnection of a plurality of logic blocks, or portions thereof, to form a single logical entity that can implement large user circuits such as PALs, lookup tables, multiplexers, tristate buffers, and memories. One embodiment includes a configurable logic block. In a first mode, the logic block provides two N-input LUTs having N shared inputs and two separate outputs. The outputs are then combined using an expander to generate an (N+1)-input function. In a second mode, the logic block provides two N-input LUTs having M unshared inputs. An optional third mode provides a plurality of product term output signals based on the values of the N input signals.

Inventors: New; Bernard J. (Los Gatos, CA), Wittig; Ralph D. (Menlo Park, CA), Mohan; Sundararajarao (Sunnyvale, CA)

Assignee: Xilinx, Inc.

International Classification: H03K 19/177 (20060101); G06F 007/38 ()

Expiration Date: 05/28/2019