Patent Number: 6,401,164

Title: Sectored semiconductor memory device with configurable memory sector addresses

Abstract: A memory device comprises a plurality of independent memory sectors, external address signal inputs for receiving external address signals that address individual memory locations of the memory device, the external address signals including external memory sector address signals allowing for individually addressing each memory sector, and a memory sector selection circuit for selecting one of the plurality of memory sectors according to a value of the external memory sector address signals. A first and a second alternative internal memory sector address signal paths are provided for supplying the external memory sector address signals to the memory sector selection circuit, the first path providing no logic inversion and the second path providing logic inversion. A programmable circuit activates either one or the other of the first and second internal memory sector address signal paths, so that a position of each memory sector in a space of values (00000h-3FFFFh) of the external address signals can be changed by activating either one or the other of the first and second internal memory sector address signal paths.

Inventors: Bartoli; Simone (Cambiago, IT), Dima; Vincenzo (Monza, IT), Sali; Mauro Luigi (S. Angelo Lodigiano, IT)

Assignee: STMicroelectronics S.r.l.

International Classification: G11C 16/08 (20060101); G11C 8/12 (20060101); G11C 8/00 (20060101); G11C 16/06 (20060101); G06F 012/06 ()

Expiration Date: 06/04/2019