Patent Number: 6,426,902

Title: Semiconductor memory device having redundancy circuit capable of improving redundancy efficiency

Abstract: A redundancy circuit is used to repair a normal column containing a defective normal memory cell. The redundancy circuit comprises a redundancy column containing redundancy memory cells and a plurality of programmable decoders. When any one of the plurality of programmable decoders enters a repair mode, a column pre-decoder for selecting a column containing a normal memory cell is disabled. Each of the programmable decoders can be configured to replace a column containing a defective normal memory cell in a single memory bank or a single memory bank group with a redundancy column. Since a defective column is replaced with a redundancy column in individual banks or bank groups, redundancy efficiency is greatly improved by allowing multiple normal columns containing defective cells to be replaced using a single redundancy column.

Inventors: Lee; Hi-choon (Sungnam, KR), Lee; Seung-hoon (Yongin, KR), Kim; Hyung-dong (Suwon, KR)

Assignee: Samsung Electronics Co., Ltd.

International Classification: G11C 29/00 (20060101); G11C 007/00 ()

Expiration Date: 07/30/2019