Patent Number: 6,429,054

Title: Method of fabricating semiconductor-on-insulator (SOI) device withhyperabrupt source/drain junctions

Abstract: A method of forming a semiconductor-on-insulator (SOI) device. The methodincludes providing an SOI wafer having an active layer, a substrate and aburied insulator layer therebetween; defining an active region in theactive layer; forming a source, a drain and body in the active region, thesource and the drain forming respective hyperabrupt junctions with thebody, the hyperabrupt junctions being formed by an SPE process whichincludes amorphizing the at least one of the source and the drain,implanting dopant ion species and recrystalizing at temperature of lessthan C.; forming a gate disposed on the body such that thesource, drain, body and gate are operatively arranged to form atransistor; and forming a silicide region in each of the source and thedrain, the silicide regions being spaced from the respective hyperabruptjunctions by a lateral distance of less than about 100 .ANG..

Inventors: Krishnan; Srinath (Campbell, CA), Maszara; Witold P. (Morgan Hill, CA)


International Classification: H01L 29/40 (20060101); H01L 21/265 (20060101); H01L 29/45 (20060101); H01L 21/02 (20060101); H01L 29/66 (20060101); H01L 21/336 (20060101); H01L 29/786 (20060101); H01L 021/00 ()

Expiration Date: 08/06/2014