Patent Number: 6,429,117

Title: Method to create copper traps by modifying treatment on the dielectrics surface

Abstract: A method of preventing metal penetration and diffusion from metal structures formed over a semiconductor structure, comprising the following steps. A semiconductor structure including a patterned dielectric layer is provided. The patterned dielectric layer includes an opening and an upper surface. The dielectric layer surface is then passivated to form a passivation layer. A metal plug is formed within the dielectric layer opening. The passivation layer prevents penetration and diffusion of metal out from the metal plug into the semiconductor structure and the patterned dielectric layer.

Inventors: Sudijono; John (Singapore, SG), Aliyu; Yakub (Singapore, SG), Zhou; Mei Sheng (Singapore, SG), Chooi; Simon (Singapore, SG), Gupta; Subhash (Singapore, SG), Roy; Sudipto Ranendra (Singapore, SG), Ho; Paul Kwok Keung (Singapore, SG), Xu; Yi (Singapore, SG)

Assignee: Chartered Semiconductor Manufacturing Ltd.

International Classification: H01L 21/02 (20060101); H01L 21/768 (20060101); H01L 21/3105 (20060101); H01L 21/70 (20060101); H01L 21/316 (20060101); H01L 021/476 (); H01L 021/44 (); H01L 021/31 (); H01L 021/469 ()

Expiration Date: 08/06/2019