Patent Number: 6,429,526

Title: Method for forming a semiconductor connection with a top surface having an enlarged recess

Abstract: A method of forming a connection is comprised of the steps of depositing a lower conductor. A dielectric layer is deposited on the lower conductor, with the dielectric layer having a lower surface adjacent to the lower conductor, and having an upper surface. An opening extending between the upper surface and the lower surface of the dielectric layer is formed. A conductive plug is deposited within the opening, with the plug having an upper surface proximate the upper surface of the dielectric layer. The upper surface has an edge where the upper surface of the plug is adjacent to the dielectric layer. A recess is formed proximate to the edge of the upper surface of the plug, the recess extending into both the plug and the dielectric layer. Finally, an upper conductor is deposited on the upper surface of the dielectric layer and the upper surface of the plug. A connection thus formed is also disclosed.

Inventors: Blalock; Guy (Boise, ID), Prall; Kirk (Boise, ID), Gonzalez; Fernando (Boise, ID)

Assignee: Micron Technology, Inc.

International Classification: H01L 23/48 (20060101); H01L 23/485 (20060101); H01L 23/522 (20060101); H01L 23/528 (20060101); H01L 23/52 (20060101); H01L 23/535 (20060101); H01L 023/48 (); H01L 023/52 (); H01L 029/40 ()

Expiration Date: 08/06/2019