Patent Number: 6,434,044

Title: Method and system for generation and distribution of supply voltages in memory systems

Abstract: Techniques for producing and supplying various voltage levels within a memory system having multiple memory blocks (e.g., memory chips) are described. The various voltage levels can be produced by voltage generation circuitry (e.g., charge pump and/or regulator circuitry) within the memory system. The various voltage levels can be supplied to the multiple memory blocks through a power bus. According to one aspect, charge pump and/or regulator circuits are provided within at most one of the memory blocks of a memory system (unless back-ups are provided for fault tolerance), and a power bus is used to distribute the generated voltage levels to other of the memory blocks. According to another aspect, a memory controller generates multiple supply voltage levels that are distributed (e.g., via a power bus) to each of the memory blocks.

Inventors: Gongwer; Geoffrey Steven (Los Altos, CA), Conley; Kevin M. (San Jose, CA), Wang; Chi-Ming (Fremont, CA), Wang; Yong Liang (Saratoga, CA), Cernea; Raul Adrian (Santa Clara, CA)

Assignee: SanDisk Corporation

International Classification: G11C 5/14 (20060101); G11C 016/04 ()

Expiration Date: 08/13/2019