Patent Number: 6,434,081

Title: Calibration technique for memory devices

Abstract: Disclosed is an improved start-up/reset calibration apparatus and method for use in a memory device One of a plurality of data paths is bit wise calibrated relative to a clock signal and thereafter others of the plurality of data paths are bit wise aligned to a previously calibrated data path to produce serial and parallel bit alignment on all data paths.

Inventors: Johnson; Brian (Boise, ID), Keeth; Brent (Boise, ID)

Assignee: Micron Technology, Inc.

International Classification: G11C 7/20 (20060101); G11C 7/00 (20060101); G11C 7/10 (20060101); G11C 7/22 (20060101); G11C 11/407 (20060101); G11C 11/4072 (20060101); G11C 008/00 ()

Expiration Date: 08/13/2019