Patent Number: 6,434,582

Title: Cosine algorithm for relatively small angles

Abstract: A system and method for computing the cosine of an input value. The system comprises a logical processing unit and an addition unit. The logical processing unit comprises an input bus with a plurality of input lines for receiving an input angle value. The logical processing unit includes a first plurality of gates, preferably AND gates, coupled to the input bus. Each gate of the first plurality of gates couples to two or more of the input lines. The logical processing unit generates N output operands on N corresponding output buses. At least one of the output buses includes (a) at least one output line coupled to an output of one of the first plurality of gates, and (b) at least one output line coupled to one of the input lines of the input bus. The number N of output buses is greater than or equal to two. The addition unit couples to the N output buses of the logical processing unit, and is configured to perform an addition of the N binary operands provided on the N output buses. The addition unit generates a resultant number which represents the cosine of the input operand conveyed on the input bus. The input angle value is assumed to have a predetermined number of leading zeros. In general, output lines are coupled to (a) input lines, (b) outputs of gates, or (c) set equal to zero.

Inventors: Choe; Gwangwoo (Austin, TX), MacDonald; James R. (Austin, TX)

Assignee: Advanced Micro Devices, Inc.

International Classification: G06F 1/02 (20060101); G06F 7/38 (20060101); G06F 001/02 (); G06F 007/38 ()

Expiration Date: 08/13/2019