Patent Number: 6,445,235

Title: Iddq-testable uni-directional master-slave

Abstract: A flipflop has master and slave interconnected through a buffer. The master has its inverters located outside the signal path from input to output, as the buffer provides the driving capability required for both I.sub.DDQ -testing and operational use. This configuration enables I.sub.DDQ -testing without further circuitry added to the flipflop and reduces propagation delay in the signal path.

Inventors: Sachdev; Manoj (Eindhoven, NL)

Assignee: U.S. Philips Corporation

International Classification: G01R 31/30 (20060101); G01R 31/28 (20060101); G01R 31/3185 (20060101); G06F 11/267 (20060101); H03K 003/356 ()

Expiration Date: 09/03/2019