Patent Number: 6,480,396

Title: Printed circuit board and electronic equipment using the board

Abstract: An insulation layer is formed on a ground layer. The insulation layer includes first and second regions for forming wiring layers. The impedance of a wiring layer formed on the second region is lower than that of a wiring layer formed on the first region. A signal line pattern is formed on the wiring layer on the first region of the insulation layer. A power supply plane is formed on the wiring layer on the second region of the insulation layer in order to feed power to the signal line pattern through a termination resistor connected to the signal line pattern.

Inventors: Ninomiya; Ryoji (Tachikawa, JP)

Assignee: Kabushiki Kaisha Toshiba

International Classification: H05K 1/16 (20060101); H05K 1/02 (20060101); H05K 3/28 (20060101); H05K 1/11 (20060101); H05K 007/02 ()

Expiration Date: 11/12/2019